onTAP JTAG Blog

Just Draw It!

March 19, 2014

Have you seen Digi-Key’s new FREE online schematic and diagramming tool? It’s called Scheme-it and can be used in most browsers with no plugins required. This great little freebie tool has a library of electronic symbols, as well as an integrated Digi-Key component catalog. Better yet, there is a built-in BOM manager to keep track […]

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Calling Inspector Gadget

March 18, 2014

It’s the return of the Gadget Smackdown, brought to you by EE Live!  This year, the SMACKDOWN takes place April 1–3 in the EE Times Fantastical Theater of Engineering Innovation at the San Jose convention Center, where the EE Live! Conference and Expo is being held. The presser for this event encourages anyone who loves […]

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Using onTAP to test a board

February 12, 2013

What Does onTAP Test?   As boundary scan technology grows in popularity, more JTAG compliant devices (1149.1 and 1149.6) are now being included in board design, along with more JTAG chains that often require simultaneous testing. The great advantage to using onTAP, is that there are no restrictions on the number of devices in a […]

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New to Boundary Scan Test?

February 5, 2013

Many newcomers to JTAG test start their first boundary scan projects knowing only that boundary scan testing is a requirement for new board design. The specifics of boundary scan, details of test strategy or expected results are, for many, uncharted territory. In fact, most newcomers to boundary scan testing don’t know what questions to ask […]

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How Boundary Scan Works

January 29, 2013

A Brief Overview The boundary scan test architecture provides a way to test interconnects between integrated circuits (ICs) on a board without using physical test probes. It contains cells within a device that can capture data from pin or core logic signals or force data onto pins. The captured data is shifted out and externally […]

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