Knowledge Base
Here is a selection of tips and information sheets we’ve put together to help with some of your boundary scan tasks. Below you will find onTAP Boundary Scan product documentation and select onTAP boundary scan/JTAG test application notes.
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If there is a topic you do not see, please contact onTAP technical support.
Detecting Mid-State/Resistive Shorts 
- Mid-state shorts are a major problem that often goes undetected by typical boundary scan connectivity tests is mid-state/resitive shorts. Flynn Systems recognized this "hole" in boundary scan testing and was the first boundary scan test company to test for mid-state shorts, improving test fault coverage.
Software Fault Insertion – Improves boundary scan test diagnostics by letting you verify fault coverage by injecting faults into your test. Increase confidence in your test results.
Eliminating the "Ground Bounce" Effect – This test setting option reduces the number of output pins switching simultaneously in any test scan.
Managing Differential I/O Pins – Addresses post-configuration I/O for FPGA and CPLD devices.
Managing Modules – Easily include multi-die modules in your test development procedure. Improves test fault coverage.
BIST – Built In Self Test, also referred to as user defined test. Shows the procedure to incorporate BIST in your onTAP test strategy.
Parallel Testing – PC based, parallel JTAG testing speeds manufacturing, and eliminates the need for expensive test hardware.
onTAP HighSpeed USB Cable Installation Instructions
onTAP Series 4000 Boundary Scan Software Information
An overview of onTAP’s capabilities and features within onTAP Series 4000.
Information about the complete boundary scan solution and how onTAP helps speed test development and increase test fault coverage.
This overview of the new graphical debug environment for onTAP Series 4000 provides information showing how ProScan improves your test development and manufacturing testing.
Learn about how onTAP provides an upgrade path and that fits your manufacturing test and FLASH programming needs.
The onTAP DLL runs with third-party test executives, expanding your test capability.
Learn how onTAP and Flynn Systems works with you as a partner to maximize test fault coverage, speed test development, time to market, and maximizes your ROI.
Get more information on the benefits of maintaining a current Flynn Systems Technical Support agreement.
onTAP Supported Netlist Readers*
onTAP supports over two dozen netlists. Here is a list of netlist readers currently available. Please contact us if your netlist is not supported.
onTAP Supported Cluster & Flash Models*
Flynn Systems works hard to maintain a current list of working and verified models of all types of memory, flash, and discreet components. All of these models are made using the DTS Language, and are not project specific. These models are flexible, easy to modify, and completely re-usable.
*We have the ability to make and add netlist translators and models for your project.
Application Notes:
Developing a JTAG Interconnect Test Tutorial
Learn how to develop interconnect tests and maximize test fault coverage with onTAP. Tests include basic interconnect, AC Coupled circuits (IEEE 1149.6), loop backs, and mid-state shorts.
Cluster Testing & Non-Scan Devices
onTAP handles memory and other non-scan devices such as popular SRAM, SDRAM, I2C, DDR2, DDR3, Ethernet, PCI…
onTAP programs flash devices, and calculates an estimated programming time. Direct Drive SPI Flash Programming capability also available.
Use the information in this document to better understand the DTS language and how to adjust onTAP DTS models.
Learn how to boost fault coverage by testing circuits between pins.
Easily include multi-die modules in your test development procedure.
Discover what onTAP can do, and how it’s proprietary test methods will help you get the most out of your boundary scan test strategy.
