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Flynn Systems Selects Keyware Technology Co., Ltd. as Chinese onTAP Reseller

admin — Tue, 02 Aug 2011 17:55:39 +0000

Nashua, NH August, 2011 – Flynn Systems Corp (FSC), developer of onTAP Boundary Scan Solutions, and Keyware Technology Co., Ltd. the Chinese software test technology leader in strategies and development of boundary scan and functional test, have established a new strategic relationship. Flynn Systems’ has made Keyware Technology Co., Ltd. their new onTAP Boundary Scan Solutions Value Added Service Reseller in China. Serving both domestic and international customers, Keyware Technology Co., Ltd. is located in Beijing, China. Keyware provides complete JTAG tutorial and customer consulting, DFT and JTAG test program development support for onTAP in conjunction with its functional and software test services. To assist Keyware in expanding its boundary scan test offerings, FSC is providing a complete suite of onTAP Boundary Scan hardware and software, along with technical support to enable Keyware to develop and run comprehensive JTAG tests using onTAP Boundary Scan Series 4000.

Current and potential Chinese customers of onTAP Boundary Scan Solutions are encouraged to use Keyware as a resource for rapid, responsive, full service test solutions. Ryan Flynn, FSC’s Marketing Manager says, “This is a terrific opportunity for Flynn Systems. We are excited to work with such a dynamic and competent group like Keyware. Keyware has demonstrated deep working knowledge of onTAP and is known for helping customers by simplifying test strategies while giving the best overall test solutions. We believe working with Keyware offers Chinese users of onTAP more options for sales and support, and ultimately a broader range of test development services. We are confident in their capabilities, in their tests and the high level of customer service they deliver to our mutual customers.”

KEYWARE (http://www.keyware.com.cn) is a leading developer and supplier of JTAG test solutions in China and Taiwan. Keyware is a team of software test experts and engineers focused on delivering precise and robust solutions. Keyware provides boundary scan /JTAG and functional test sales and support for many diverse industries including high tech, medical, green tech, gaming, and defense.

Design-For-Testability (DFT) analysis including checking the DFT compliance of customer’s design before board layout. onTAP Boundary Scan/(JTAG) test program development, including on-board programming of CPLD, FPGA, flash, I²C, IEEE 1149.6
Chinese language sales and support team trained in using onTAP tools for a full range of boundary scan applications.

color:#454545">Flynn Systems Corp. color:#454545"> (www.flynn.com) has provided test, debug, and programming solutions for the Boundary Scan test standard (JTAG IEEE 1149.1 – 6) for over ten years. Their onTAP software package delivers completely automated Boundary Scan testing for devices of all levels of complexity on printed circuit boards (PCB) and non-Boundary Scan devices interacting with the scan enabled devices. onTAP’s functionality also includes the capability to program flash devices using only the onTAP USB Test and Programming Cable. Flynn Systems Corp. provides high level test suites and the highest fault coverage available with a powerful ATG engine: all backed by fast, responsive technical support. Its satisfied customers include Intel, Qualcomm, Harris RF, Benchmark Electronics, Raytheon, L-3 Communications, Cadence Design, Teradyne, Checkpoint Systems, Ulticom, and University of Arizona. Flynn Systems’ onTAP provides Boundary Scan services for university research, avionics, defense systems, consumer goods, and medical electronics. It is based in New Hampshire with distributors and partners in Europe and in the Middle East, and now China.

onTAP SUMMER SALE!!!

admin — Wed, 22 Jun 2011 21:56:09 +0000

Download the PDF by clicking here.

When you purchase any onTAP Boundary Scan Software license, we are giving you the option to add another license to your package for FREE*. That’s right, FREE! Buy a development seat for the lab, or an MTO for manufacturing, and get another one for a co-worker. You have your choice of an MTO or DLL. And, in the spirit of Summer and fun, easy living, we’re going to make this offer even better by giving you total flexibility. We will upgrade every license purchased between June 16 and July 20 to a USB Dongle-based Portable license.

But, you have to act fast! This special offer is only available through July 20.

We look forward to hearing from you. Please feel free to contact us to discuss your boundary scan application.

Best regards,

onTAP Boundary Scan Sales Team

www.flynn.com

sales@flynn.com

+1 (603) 598-4444

Boundary Scan that Fits Your Budget

admin — Mon, 23 Aug 2010 19:03:42 +0000

I thought it was important to post something about onTAP being the perfect boundary scan solution for any JTAG user, but especially those in budget critical situations after some weekend reading brought me across a couple of articles in Electronics Weekly about boundary scan useage and budgetary demands. One article from April 28, 2010 titled Boundary Scan on a Budget (http://www.electronicsweekly.com/Articles/2010/04/28/48512/boundary-scan-on-a-budget.htm) and another June 29, 2010 article Agilent gets serious about JTAG test describe how users are seeing an increased use of boundary scan brings down costs. However, the article fails to point out any real costs or even estimated costs for boundary scan tools. We all know that this stuff isn’t inexpensive, but how much can one expect to pay? With onTAP, you will receive a complete boundary scan system for under $15,000. Read on for more details.

As you may already be aware, onTAP regularly competes with all the other boundary scan vendors, world-wide, and wins. In many cases, other boundary scan customers are the same as onTAP customers. In many other cases, onTAP has been selected to replace other boundary scan systems because of the great value and support it delivers, at a substantially lower cost, thus enabling more widespread deployment.

While the other systems are sold piecemeal, onTAP is an all inclusive netlist based boundary scan system that enables users to develop and run automated interconnect tests, debug the tests using ProScan, the built-in graphical debug environment, capture pin-level diagnostic messages, view reports and edit tests. IEEE 1149.1 and 1149.6 compliant, onTAP also automatically accounts for AC coupled circuits. Moreover, onTAP enables users to develop and run reliable, reusable memory cluster tests, program flash and control I2C buses. There is a built-in library of buffers, resistors, and transceivers, while more complex models are kept in our library. Our models are developed free of charge and can be customized to a user’s particular needs. All models are completely reusable across different projects and just as importantly, offer great flexibility making it simple to tailor to a particular user’s needs.

The models are written in a C-like language called DTS, a legacy of Flynn Systems’ GenRad and Automatic Test Generation roots, and are easily edited by any user with a simple working knowledge of C and the accompaniment of the DTS Programming Manual.

That, in a nut-shell is onTAP. So, what makes it attractive for the value-seeking user? A complete onTAP Boundary Scan system is at least 20% less the lowest cost comparable product and we offer a 30 Day no obligation evaluation. The average cost of a complete onTAP Boundary Scan System, including a dual channel HighSpeed USB JTAG controller is under $15,000 USD.

onTAP Supports IEEE 1149.6!

admin — Fri, 14 May 2010 20:26:45 +0000

As we have promised our users, Flynn Systems continues to develop and add new features to onTAP Boundary Scan Software. These new features vastly improve onTAP’s capability, enabling onTAP users to do more with less. We had been developing support for IEEE 1149.6 for several months, and at the end of April, we were able to fully implement the IEEE 1149.6 standard into the current version of onTAP. It has been rigorously field tested, and we are proud to release it to our user community. Please download the newest version of onTAP, and feel free to begin developing truly complete, robust JTAG tests for your projects with IEEE 1149.6 capability.

onTAP Boundary Scan Software Now Supports IEEE 1149.6

NASHUA, NH May 14, 2010 – Flynn Systems Corp is proud to announce the latest version of onTAP is IEEE 1149.6 compliant. The implementation of IEEE 1149.6 greatly enhances onTAP’s scope and capability, while delivering more JTAG test coverage and power to current and interested onTAP users.

According to Ryan Flynn, onTAP Marketing Manager, “As Xilinx and Altera begin to implement IEEE 1149.6 protocols in their latest designs, including the Virtex 6 and Aria GX devices (respectively), it was increasingly important for us to enable onTAP users with every bit of capability so they could harness the full test potential of these new devices and implement them into their designs. onTAP’s IEEE 1149.6 implementation has been field tested in very intense and rigorous applications with Intel. Intel’s success has been a heck of proving ground for onTAP.”

As implementation of IEEE 1149.1 and 1149.X Boundary Scan testing becomes more widespread, greater flexibility, faster speeds, and smoother operation are needed. Flynn Systems’ commitment to its Customers has always been to keep onTAP a live software by continuing to support, develop, and enhance onTAP tools that capitalize on JTAG test capability. The 1149.6 implementation is another demonstration of Flynn’s commitment to its user base.

onTAP’s new update expands users’ test capabilities, flexibility, and further enhances test fault coverage in a number of ways. Most apparent is the productivity gain achieved by testing to both IEEE 1149.1 and IEEE 1149.6 standards. The IEEE 1149.6 feature enables users to test AC Coupled circuits and differential pairs to the industry standard protocol. Adding these two elements to a test not only increases test fault coverage, but also creates a more robust and reliable test by incorporating additional aspects of the board in the test.

Flynn Systems continues its pursuit of delivering cost-effective, complete, robust JTAG test and programming software packages with attentive and dedicated technical support to its current users and anyone interested in a feature-rich, high-value complete JTAG solution at a reasonable price.

About Flynn Systems:

Flynn Systems began delivering Automatic Test Generation Solutions to the ATE market as FS-ATG in 1986. In late 1999, they transitioned to the boundary scan market with onTAP and have provided test, debug, and programming solutions for the boundary scan test standard (JTAG IEEE 1149.1) for over ten years. Their onTAP software package is designed for completely automated boundary scan testing for devices of all levels of complexity on printed circuit boards (PCB) and non-boundary scan devices interacting with the scan enabled devices. onTAP’s functionality also includes the capability to program FLASH devices using only the onTAP USB Test and Programming Cable (HighSpeed included). Flynn Systems Corp. provides high level test suites and the highest fault coverage available with a powerful ATG engine: all backed by fast, responsive technical support. Its satisfied customers include Intel, Qualcom, Harris RF, Benchmark Electronics, Raytheon, L-3 Communications, Cadence Design, Teradyne, Checkpoint Systems, Ulticom, and University of Arizona. Flynn Systems’ onTAP provides boundary scan services for university research, avionics, defense systems, consumer goods, and medical electronics. It is based in New Hampshire with distributors and partners in Europe and Asia.

Those interested are invited to download a free 30 day evaluation software package with full technical support available at www.flynn.com.

Groundhog Day Sale

admin — Tue, 02 Feb 2010 21:30:37 +0000

EVERYTHING YOU NEED

Nashua, NH by-way-of Gobbler’s Nob, Punxsutawney, Pennsylvania – Well, it’s official! The groundhog poked out and saw its shadow. Settle in for six more weeks of winter. The upside is, you have six more weeks to not worry about nice sunny days and walks in the park with sunshine on your face. That means more winter time to dedicate to developing and debugging your projects so when spring does finally arrive, you’re ready to take full advantage of the nice spring weather.

We know you’re busy, but bargains are always welcome. Flynn Systems is announcing its Groundhog Day Special.

Even though we all got the bad news that winter is continuing for six more weeks, we want to give you some good news about boundary scan test tools. When you purchase any onTAP Boundary Scan Software license, we are giving you the option to add another license to your package for FREE*. That’s right, FREE. Buy a development seat for the lab, or an MTO for manufacturing, and get another one for a co-worker. You have your choice of an MTO or DLL.

Act fast, this offer only lasts until the first official day of spring – March 20, 2010

We look forward to hearing from you. Please feel free to contact us to discuss your boundary scan application.

THE SMALL PRINT:

*Free onTAP software offer applies to all quotes generated between Feb. 2 2010 and March 20, 2010 and is limited to one free license per quote. Offer is also limited to either an MTO or DLL. Offer expires on March 20, 2010.

Happy New Year – Welcome 2010

admin — Mon, 18 Jan 2010 17:40:17 +0000

We hope everyone is off to a strong and promising 2010. By all signs, it appears that this year will deliver new innovations and products to the electronics market. We certainly are excited to hear about our customers new projects and are looking forward to sharing our new developments with you through out the course of this exciting new year.

Keep an eye for some major upgrades to the software that are sure to greatly increase test capability, usability, and productivity.

Here’s to a successful and prosperous 2010!

Properly Managing Common Tri-State Control Cells Boosts Fault Coverage

admin — Wed, 16 Dec 2009 20:16:00 +0000

As the boundary scan community continues looking for new ways to improve test procedures and achieve higher and higher fault coverage, we expect the test tools to compensate for shortcomings in silicon devices or board design. We are constantly exposed to new situations in boundary scan test and new approaches to using boundary scan to achieve better test fault coverage. One item standing in the way of higher, more accurate fault coverage is common tri-state control cells.

Common tri-state control cells are groups of pins on a common net. Just as the name suggests, they are tri-state pins, grouped together by a common function, sharing a boundary scan cell. Though this is efficient for circuitry, it poses some issues during JTAG test. For example, when a single pin on the common cell drives or senses a value, all the pins associated with that cell are forced to perform the same function, simultaneously. This is represented in the following drawing.

Un-handled common tri-state cells can have a negative impact on boundary scan test, dramatically reducing accuracy and fault coverage of opens and shorts tests because multiple pins sharing a common net drive in the same test vector, as displayed in the screen capture below.

In this image, you can see pins U23.AA14 and U36.AE30 are on net U23_AA14. This test is not accounting for the tri-state pins on the common control cell, ultimately compromising fault coverage.

The yellow 0 and 1 characters show drive, or boundary register update, values at each test vector, and the green L and H values show expected boundary register capture values on the vectors following an update.

This image shows the netlist view of the Mv6430 boundary scan device, while the following image displays the pins in an expanded view.

This image shows how the test was revised to account for the tri-state pins on the common control cell. The result is a boost in fault coverage, with the added benefit of making the test more accurate.

As explained in the text box in this screen shot, onTAP accounts for the shared cells and adds additional test vectors to ensure pins do not drive simultaneously, allowing for more comprehensive tests that deliver higher, and most importantly, more accurate, test fault coverage.

Accepting New Turnkey JTAG Projects

admin — Tue, 17 Nov 2009 20:58:35 +0000

Flynn Systems wants to let our users know that we are accepting new JTAG / Boundary Scan projects for Q1-2/10

While our standard Technical Support provides assistance with test and development issues, our boundary scan test development services go beyond onTAP technical support services by taking the boundary scan / JTAG test development and debugging off your plate, allowing you to focus your undivided attention on your core business issues as you move through development and prototyping into manufacturing.

Our Boundary Scan Test Development Service is very popular with both existing and new customers. In fact, 4 out of 5 customers who have used onTAP boundary scan test development services once, immediately recognize the cost and time savings, and return within 4 months with another project. By turning over your JTAG / Boundary Scan test development to Flynn Systems, you are able focus on other aspects of your project without being distracted by developing and debugging boundary scan tests.

We ensure that your boundary scan tests are maximized for the highest possible fault coverage, are completely debugged, and are ready for the manufacturing floor, so the end user only has to “press a button.”

We support our tests and we will support you and/or your contract manufacturer by answering questions and bringing all parties involved up-to-speed with boundary scan test and onTAP procedures and reports.

Our test development features:

JTAG TAP infrastructure tests.
Interconnect tests including detection of opens, shorts, stuck-at, bus-wire, pull-up/down related faults.
Memory tests
Cluster tests of non-JTAG components
Flash programming
In-system programming configuration
Pin-level diagnostics
On-going support

All of our tests are comprehensive, accurate, supported and reliable.

Call us today to get started.

Click here to learn more about onTAP Turnkey Service

JTAG.TECT Delivers onTAP to Russian Customers

admin — Mon, 09 Nov 2009 22:13:05 +0000

Flynn Systems – StarTest Technology Partnership Press Release

Flynn Systems and StarTest, along with their subsidiary JTAG.TECT (www.jtag-test.ru), have established a strategic relationship making JTAG.TECT the authorized Flynn Systems’ onTAP Boundary Scan Solutions dealer in Russia and countries of the former USSR. JTAG.TECT bundles onTAP Boundary Scan Solutions with their JTAG test solutions and services and provides complete JTAG tutorial and customer consulting, DFT and JTAG test program development support for onTAP. Flynn Systems has also integrated StarTest‘s JTAG hardware and software environment with the JTAG test and programming tools of the onTAP Boundary Scan Series 4000.

Current and potential customers of onTAP Boundary Scan Solutions, and onTAP Series 4000 are able to use some of StarTest‘s hardware and software solutions (DIMM/SODIMM External Modules, TAP Distributor and Bridge-For-Testability hardware tools, Operator Fault Spotlight software tool), as built-in features of the onTAP Boundary Scan Solution, usable throughout the users’ product lifecycle, including volume manufacturing and in-the-field troubleshooting and repair.

StarTest Ltd. (www.start-test.com) is a leading developer and supplier of JTAG test solutions in Israel across all hardware levels, including device, board, and system. StarTest is a team of test experts and engineers with more than 70 years of combined worldwide experience. StarTestserves as a JTAG and In-System Test (ICT) support supplier for:

Design-For-Testability (DFT) analysis and checking the DFT compliance of customer’s design before board layout and on all stages of the product lifecycle
JTAG (Boundary Scan) test program development, including on-board programming of CPLD, FPGA, flash, I²C, with different tools and platforms
ICT test program development for the Teradyne Z18xx testers with full test process support on the customer production facility

Flynn Systems Corp.(www.flynn.com) has provided test, debug, and programming solutions for the Boundary Scan test standard (JTAG IEEE 1149.1) for over ten years. Their onTAP software package delivers completely automated Boundary Scan testing for devices of all levels of complexity on printed circuit boards (PCB) and non-Boundary Scan devices interacting with the scan enabled devices. onTAP’s functionality also includes the capability to program flash devices using only the onTAP USB Test and Programming Cable. Flynn Systems Corp. provides high level test suites and the highest fault coverage available with a powerful ATG engine: all backed by fast, responsive technical support. Its satisfied customers include Intel, Qualcomm, Harris RF, Benchmark Electronics, Raytheon, L-3 Communications, Cadence Design, Teradyne, Checkpoint Systems, Ulticom, and University of Arizona. Flynn Systems’ onTAP provides Boundary Scan services for university research, avionics, defense systems, consumer goods, and medical electronics. It is based in New Hampshire with distributors and partners in Europe and in the Middle East.

onTAP BIST (Built In Self Test)

admin — Wed, 04 Nov 2009 16:47:13 +0000

Tests may be defined in script files which may then be translated into executable Serial Vector Format (SVF) files. The general approach is to place all of the required BSDL files into a folder and then to relate the BSDL files to circuit locations in declarations at the beginning of the script file. Once BIT_STRINGS are defined, instruction register scans may be created by simply declaring the instruction names to be used. And data scans can be created by concatenating BIT_STRINGS. String variables may be assigned values and then multiple variables may be concatenated. In addition literal string assignments may be used directly or mixed with variables.

Values are always expressed as binary strings, BIT_STRINGS. If zero and one values are present in a TDO string, the corresponding MASK bits will be set to one. If ‘X’ characters are present in a TDO string, the corresponding mask bits are set to zero.

The following example shows a very literal application of an IDCODE test to a three device chain. Comments, beginning with the ! character, explain the purpose of each statement and are consistent with SVF syntax. Note that onTAP allows C-like flow control expressions to be embedded within SVF files and that these expressions also use exclamation marks. onTAP distinguishes the two based on context.

As found in the onTAP folder on your computer:

Example of a User Defined IDCODE Test for Three Devices , U2,U3,U4( see onTAP/examples/UserDefinedTests/ idcode_batch.txt).

!Begin here….

create svf c:\bsdapps\UserDefined\idcode.svf; ! the following user statements will be placed in this SVF file

! onTAP uses the declarations between the begin chain and end chain lines to define the chain and to associate a BSDL file with each

! circuit location in the chain.

begin chain;

U2 = xc9536xl_pc44;

U3 = ispLSI2032VE;

U4 = 3032AL44;

end chain;

BIT_STRING u2_version, U2_part_num, U2_manuf_id, U2_required; // declare string variables for U2 IDCODE fields

BIT_STRING u3_version, U3_part_num, U3_manuf_id, U3_required; // declare string variables for U3 IDCODE fields

BIT_STRING u3_version, U3_part_num, U3_manuf_id, U3_required; // declare string variables for U4 IDCODE fields

BIT_STRING u4_version, U4_part_num, U4_manuf_id, U4_required; // declare string variables for U4 IDCODE fields

BIT_STRING zeroes;

state reset; ! place chain defined in TAPMAP in reset state

begin scan; ! onTAP creates one SIR scan in SVF file for U1,U2,U3

U2=IDCODE; ! if the BSDL file is in the folder, onTAP will find the opcode for U2’s IDCODE instruction

U3=IDCODE;

U4=IDCODE;

end scan;

! When compliled with Tools/Compose SVF, onTAP uses the declarations between begin scan and end scan lines

! to create an SIR scan that loads the IDCODE instructions.

U2_version = "XXXX"; ! IDCODE version field from U2’s BSDL file

U2_part_num = "1001011000000010"; ! part number

U2_manuf_id = "00001001001"; U2’s manufacturer’s id

U2_required = "1"; // required by BSDL spec

U3_version = "0001"; ! IDCODE version field from U3’s BSDL file

U3_part_num = "0000001100000001"; ! part number

U3_manuf_id = "00000100001"; U3’s manufacturer’s id

U3_required = "1"; // required by 1149.1 spec

U4_version = "0001"; ! IDCODE version field from U4’s BSDL file

U4_part_num = "0111000000110010"; ! part number

U4_manuf_id = "00001101110"; U4’s manufacturer’s id

U4_required = "1"; // required by BSDL spec

zeroes = "00000000000000000000000000000000"; // 32 zeroes

! TDI definesTest Data In and TDO defines Test Data Out.

! The strings in the TDO expression will be concatenated. LSB is on the right.

begin scan;

U2 = TDI(zeroes) TDO(U2_version+ U2_part_num+ U2_manuf_id+ U2_required); !concatenate BIT_STRINGS to form TDO string

U3 = TDI(zeroes) TDO(U3_version+ U3_part_num+ U3_manuf_id+ U3_required);

U4 = TDI(zeroes) TDO(U4_version+ U4_part_num+ U4_manuf_id+ U4_required);

end scan;

! When compiled with Tools/Compose SVF, the declarations between begin and end scan will be compiled into

! an SVF SDR scan.

! Examples of test statements that may be applied follow. onTAP will extract the measured value from SDR scans and will update

! BIT_STRING values so that they can be used in control flow branch expressions as shown below.

if ( U3_part_num != "0000001100000001" )

{

MESSAGE_PAUSE("U3’s IDCODE part number, %%s, is incorrect. Should be "0000001100000001"",U3_part_num);

}

if ( !(U2_part_num & "010"))

{

MESSAGE("bit 1 in U2’s part number reads low but should be high");

}

if ( U3_part_num != "0000001100000001" )

{

MESSAGE("U3’s part number reads %%s, but should read 0000001100000001", U3_part_num);

}

if ( FAIL )

{

MESSAGE("IDCODE test fails");

}

User defined script files may be compiled into SVF files by selecting the Compose SVF File menu item from the Tools menu.

When the command file, idcode_batch.txt, is called a new SVF file, IDCODE.SVF is created. Instructions such as “state reset;” are transferred directly into the new SVF file. onTAP compiles chain-wide SIR and SDR instructions based on a list of SIR and SDR instructions for each device in the target chain. SIR and SDR statements for the first device in a chain are listed first and statements for the last device are listed last.

A “log scan data on;” statement enables all scan-in and scan-out data to be captured in the scandata.txt file.

User Defined Instruction Statements

Statement	Use
create filename.svf;	Begin ceation of a new SVF file.
state state_name	Sequence TAP to designated state.
begin scan;	Begin steps that will be compiled into an SIR or SDR scan .
end scan;	End steps that will be compiled into an SIR or SDR scan .
BIT_STRING_name;	Declare string variables.
LogScanDataOn()	Enables logging of scan data to the project folder file scandata.txt.
LogScanDataOff()	Disables logging of scan data to the project folder file scandata.txt.