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How to Create Lattice .SIM
Files
|
| Source
Files Required |
.SIM |
| Design
Software |
Lattice
pDS+ or ispDesignExpert Software |
| Supported
Families |
ispLSI 1000, 2000, 3000, 6000 |
How
to obtain a valid .SIM source file
The SIM file is an output
file from the Lattice pDS+ or ispDesignExpert software.
- At the pDS software option,
CHOICE OF OUTPUT FILE, select .SIM File.
- The resultant .SIM file
is formatted to run through FS-ATG.
There are several versions of the Lattice pDS software
from which you can generate .SIM files: pDS for Lattice,
pDS for ViewLogic, and pDS+ for Abel.
- If using pDS+ for Abel,
version 1.6 or higher is required.
- If using Lattice pDS software
earlier than v2.0, then you must take
an additional step to ensure that the .SIM file includes
LOCK statements on
all bi-directional pins. .SIM files created with older
versions may be missing
LOCK statements, and will not work properly with
FS-ATG. To check
for this condition, look in the .RPT file generated
by the Lattice pDS software. Compare the LOCK statements
in the .RPT file with
corresponding pin statements in the .SIM file. If any
LOCK statements in
the .SIM are missing, you must enter these statements
manually.
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