How to obtain a flattened edif netlist using Xilinx ISE WebPACK 5.1

The .EDN is a flattened edif netlist file.

1. In WebPACK 5.1 Run the Synthesis and Implement routines.
2. Open the Implement tree.
3. Open the FIT tree.
4. Run the Lock Pins routine.
5. Run the Generate Timing routine.
6. Run the Generate Post-FIT simulation model. (This creates the NGA file)

7. From a Command Prompt, run the following:
   ngd2edif -a -hpn <input.nga> <output.edn>
   (The input.nga file will have the name of the top-level VHDL entity)

8. Copy this file to your FS-ATG Project directory.

(These instructions provided courtesy of Bob Wolf and Ron Kralik, satisfied FS-ATG test users at Becton-Dickson and Company, Sparks, MD.)