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onTAP Boundary Scan Software
has everything you need to develop and run effective JTAG testing
on your printed circuit boards. onTAP Boundary Scan Software
automates and simplifies test development
for beginners and experts alike, generating boundary scan tests
that are effective and reliable!
- Interconnect,
Bus Wire, Pull-up/Pull-down, TAP Infrastructure tests, Shorts
and Opens
- Memory/Cluster
tests employ Virtual Pins to test non-JTAG memory and FLASH
devices.
- Memory and Flash models available.
- Run tests from your PC through your JTAG
Programming Cables at clock speeds up to 10 MHz
- Browse
netlist, Sample application
signals, Set pin values,
Measure responses
- Robust ATPG for high fault
coverage and precise pin-level diagnostics
- Program
Flash
- High-level Cluster Test Modeling
language, featuring C-like expressions and flow control
- Manage
bus devices, jumpers and transparency
- Highly-responsive Technical
Support helps get your project running!
 Some of these linked documents
are in Portable Document Format (PDF) in order to retain the
original format. To view or print these documents, you must
use the Adobe Acrobat Reader.
Here are more onTAP
Boundary Scan Software
features you are sure to find useful: |
| Test Development |
- Supports all standard IEEE
1149.1 Tests
- BSDL Syntax Verification
cites exact 1149.1 spec & paragraph.
- Tests tailored to standard CAD
Board Netlists
- Test Procedure Palette
provides many test options
- Graphical Views help
you visualize your scan chains, and circuit
- Extensive Online Help
- Easy Windows 2000/XP
screens guide you through test generation
- Concurrent Parallel Chain
Tests
- Test Executive with Scan
Sequencer
- User-Defined tests
- DLL for third-party
test executives
- Netlist Merge, Examine SVF and many tools
for development and debug
- and more!
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