How to Insert Faults From a File with onTAP® JTAG Boundary-Scan Test (IEEE 1149.1) and FPGA CPLD Automatic Test Generation Program software by Flynn Systems

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onTAP - How to Insert Faults From a File

Use this function to:

Check the fault coverage of your test for a specific fault condition.
Insert an open fault without modifying your board or test fixture.
Validate that your test is working as expected.

How to Insert Faults

1. Create a file FaultInsert.txt in your test project directory.

2. Add fault declarations to the FaultInsert.txt file as shown below. A sample file with syntax examples can be found in the /onTAP program directory.

	open u6.15;	// pin will be open to all signals
	open u9.12,u12.8;	// multiple pins will fail to capture other pins' signals
	stucklow u6.18;	// pin and net are stuck low
	stucklow u20.a5;	// all pins on net ADDR14 will be measured low
	short u3.8 u2.10;	// shorts nets of pins in list, low values prevail.
	drivelow u17.6;	// always drive pin to a low value
	drivehigh u13.18;	// always drive pin to a high value
	drivez u7.a2;	// always drive pin to a high impedance
	measurelow u20.9;
	measurehigh u67.3;

3. Run the project's SVF file from the onTAP Test Screen.

When onTAP detects a FaultInsert.txt file in your project folder, it posts a message so that when you run the the test, diagnostic messages corresponding to the inserted fault expressions are displayed.