We know you. You're a PC Board designer. Boundary Scan test development is
not your principal job, but now you have a project due…yesterday.
onTAP® was built with you in mind!

onTAP provides the tools and screens to both develop and run comprehensive
netlist-based boundary scan test solutions.

onTAP can help you get your project done quickly, cost-effectively, and right the
first time! Download onTAP and see how easy it is to get quick, comprehensive
JTAG tests running, using just your standard programming cables.

High-Powered Features at Unheard of Prices!

onTAP Base System
  Automated Interconnect Tests feature      onTAP boundary scan test generator and      run-time test screens
  IEEE 1149.1 BSDL Syntax Checking
  Precise pin-level diagnostics, including
     TAP, shorts, opens, stuck-at, bus-wire,
     and resistor faults
  Netlist-based, supports over a dozen CAD      netlist formats
  Multiple interactive chains. Run up to four      parallel interactive chains
  Differential I/O
  Runs with standard programming cables
  World class, responsive support
  Netlist Browser/Pin Wiggler with GUI +
     Script
  Boundary scan simulator
  Testability Reports
  Graphical Interface Organizer/Manager
  User Defined Tests great for BIST
  Netlist Merge
  Testability Reports
  Automatic transparency bus directional      control
   Burn-In
  Manufacturing Test screen
  TCK clock rates up to 10MHz. Runs Xilinx      Cable IV in ECP mode
  Comprehensive guard controls protect      against contention
  Many program development and debug tools
  SVF Serial Vector Format Files

onTAP Options
  Memory and Cluster Testing
  High-level test and programming models      sport C-like flow control, pin-groups as      variables, and function calls
  Reusable cluster/memory models
  Flash boot code programming
  DLL for test executives such as NI's      LabView, etc.
  Expansion I/O
  Translator for Teradyne/GenRad ICT
  INTEST
  In-system programming for CPLDs/FPGAs
  Test Only System

Boundary Scan That's Right for You

Let Flynn Systems demonstrate how this power-packed software tool can create
boundary scan solutions and run them through your standard FPGA/CPLD
programming cables. You will be amazed as onTAP converts your CAD netlists
and BSDL files to robust JTAG tests.

onTAP's pin-level diagnostics precisely report TAP problems, opens, shorts,
bus-wire and pull resistor faults. And, for the curious who want to see what's
happening under those BGAs, the pin wiggler feature allows you to easily set and
observe test values.

For precise control of memory and other non-JTAG parts hanging off your
boundary scan devices, try onTAP's DTS cluster testing. You're going to love the
run-time control and you will really appreciate the C-like modeling syntax.

onTAP Organizes JTAG Jobs so You don't have to

If you have created JTAG Test applications in the past, you know the issues that
must be addressed to do it right: board netlists, BSDL errors, jumpers, bus
control, guards, non-jtag components, custom memory test, and on and on…
onTAP's organizing screens move you logically and successfully through
all the details.

Tech Support that Cares

Whether it's during a free 30-day trial or fully licensed support, Flynn
Systems wants to see your boundary scan project running now! We have
the experience to get you past the testability problems, so let us be your
partner and help get you over the tough spots. You'll receive attentive
telephone and email support until the job is done.

Free Thirty Day Trial!

Take advantage of this opportunity to get your JTAG project up and
running. We know you'll appreciate the power of onTAP and the
helpfulness of our technical support well before thirty days is up!

Visit Us!

We love to talk boundary scan! So drop by www.flynn.com
or call at 603-598-4444 and we'll get you started on your project today!