onTAP® Pricing Information JTAG Boundary-Scan Test (IEEE 1149.1) and FPGA CPLD Automatic Test Generation Program software by Flynn Systems

We accept:

onTAP - North American Pricing Only - Effective 4 February 2008

Products	Part Number	Price	Unit Price Multiple Order 2-5
onTAP Boundary Scan Software Including: Test Development System Run Time Test System with scan sequencer Netlist Browser, Application Signal Sampling Viewer and Pin Wiggler Node-Locked License One year of technical support with program updates *See onTAP Component Description for details*	FS-7002	$3,225	$2,625
onTAP Run-Time DLL (Dynamic Link Library runs all onTAP SVF test files) Includes one year of technical support with program updates	FS-9402	$2,225	$2,050
Annual Technical Support Renewal with Program Updates Run-Time DLL (Includes telephone and e-mail technical support regarding operation of onTAP plus download access to onTAP updates.)	FS-9499	$1,125	$1,050
Annual Technical Support Renewal with Program Updates (Includes telephone and e-mail technical support regarding operation of onTAP plus download access to onTAP updates.)	FS-7999	$1,375	$1,250
Project Development Assistance: Flynn Systems runs customer project files, provides telephone support, makes testability recommendations, and assists in creating a cluster test model plus jumper transparency models.	FS-9300	Call for quote
Manufacturing Test Only (MTO) screen provides same access to all test and diagnostic information as full development system, but restricts use to the test screens and restricts access to menu items that could alter the tests. Includes one year of technical support with program updates	FS-9502	$2,250	$2,050
Annual Technical Support Renewal with Program Updates Manufacturing Test Only (Includes telephone and e-mail technical support regarding operation of onTAP plus download access to onTAP updates.)	FS-9599	$1,150	$1,050

Options	Part Number	Price	Unit Price Multiple Order 2-5
Memory/Cluster Test (High-level DTS test language provides flexible, reusable test models for non-JTAG devices.) Flash Programming (Uses DTS models to program FLASH devices)	FS-7100	$1,275	$1,125
Portable License Upgrade (USB dongle-based) Allows onTAP to move to any Windows 2000 or Windows XP PC	FS-7003	$590*	$495*
GENRAD ICT Translator (Converts SVF file to GENRAD ICT programs, including disables and diagnostic messages) Includes one year of support	FS-7201	$2,750	$2,350

Accessories	Part Number	Unit Price **
Xilinx Parallel Cable IV (Available through Xilinx Inc., Insight Electronics)
Altera ByteBlaster II Cable (Available through Altera Corp.)
onTAP USB Cable Our own USB-based programming cable.	FS-9160	$410
onTAP Demonstration Board and Tutorial (Provides an example of developing and running boundary scan tests and diagnostics.) - Does not include programming cable.	FS-9140	$225
onTAP TAP Serializer (Allows JTAG distribution to multiple JTAG ports of different voltages and locations, providing all logic level voltage translations and buffering.)	FS-9180	$850

* Shipping and Handling - Prices do not include shipping and handling charges which are extra

onTAP Component Descriptions:

Test Development System (Automatic test generation of TAP integrity and interconnect tests based on project netlists and BSDL files. Includes BSDL syntax checking, BSDL/CKT matching, jumper management, pin constraints, Make program for adaptor files, testability information, parallel cable selection, Test Palette selections, diagnostic messages, test reports and tool suites, user-defined tests, script and command files, development and eebug tools, virtual pints, transparency and Bus Management. Outputs SVF test format files.)

Run-time System and Scan Sequencer (Runs tests and presents diagnostics independently of Test Development; Includes breakpoints, loop control and a boundary scan simulator for program debug, plus a screen for manufacturing test and burn-in.)

Netlist Browser, Application Signal Sampling Viewer and Pin Wiggler (Users may browse through net lists and may sample and view system level application signals, based on JTAG SAMPLE instruction, at any circuit location. A pin wiggler enables user to set any pin output value and to read pin input values.)

Memory and Cluster Test (Serializes and scans vector tests through boundary scan devices and chains. Vector tests for logic/memory devices are created with high-level, reusable DTS program models which may be tailored for application-specific purposes.)

DTS - Digital Test Syntax (A high level test programming language providing program flow control, direct pin control, variables, sub-routines and manipulation of pin groups.)

FLASH Programming (Uses the Memory and Cluster Test option, and DTS to program FLASH; especially suited for FLASH boot code.)

Serial Vector Format (SVF - an industry standard representation of boundary scan data extended for use with onTAP.)

Virtual Pins, Transparency and Bus Management (Virtual pins allows onTAP to "reach through" resistors and buffers to connect scannable and cluster pins. Virtual Pins also dynamically manages direction and enable control pins when accessible.

The Manufacturing Test Only screen provides the same access to all test and diagnostic information as the full development system, but restricts use to the test screens and restricts access to menu items that could alter the tests.